1. Cross-Reference to Related Applications:
This application is related to the U.S. patent application Ser. No. 749-155 entitled "Improving Diode Switching Speed", in the name of common inventor, assigned to common assignee, and filed of even date herewith.
2. Field of the Invention:
This invention relates to servosystems, particularly to Type II phase-locked loops, and more particularly to charge pumps for use in Type II phase-locked loops.
3. Description of the Prior Art:
References:
Charge-Pump Phase-Lock Loops, Floyd M. Gardner, IEEE Transactions on Communications, Vol. COM 28, No. 11, November 1980, p. 1849 et seq., IEEE publication number 0090-6778/80/1100-1849. (Hereinafter, "Gardner".) PA0 Analysis and Design of Analog Integrated Circuits, Paul R. Gray and Robert G. Meyer, John Wiley & Sons, ISBN 0-471-01367-6. (Hereinafter, "Gray") PA0 (1) the UP current and the DOWN current are equal in amplitude; PA0 (2) the transient characteristics of the UP and DOWN currents are symmetrical; PA0 (3) during times when the charge pump is not being commanded to produce current output, its output is precisely zero.
In many applications it is desirable to synchronize a generated signal with a reference signal. Type 0 and Type I servosystems are often used for frequency synchronization. In such applications as high density data processing apparatus where clock signals must be closely synchronized with data signals in order to achieve accurate data readout, the phase as well as the frequency of the two signals must be synchronized; Type II phase-locked loops are widely used for this purpose.
The Type II phase-locked loop typically includes a voltage-controlled oscillator (VCO) for generating the clock signal at a frequency which is some function of a control voltage. Adjustments to the frequency and phase of the clock signal may then be effected by adjusting the control voltage. The Type II phase-locked loop typically includes a circuit for detecting a phase difference between the clock signal and the data signal, and provision for adjusting the control voltage by an amount proportional to that phase difference. The provision for adjusting the control voltage typically includes a "charge pump" or "current pump" for generating a positive and a negative pulse of current (the "UP" current and the "DOWN" current), the difference between the integrals of which is proportional to the detected phase difference; a capacitor for integrating the current pulses; and a low-pass filter and compensation network for adjusting the control voltage by some function of the integral.
The ideal charge pump would exhibit these characteristics:
Prior-art charge pumps have utilized two complementary current sources, one for the UP current and one for the DOWN current. (See, for example, Gardner at FIGS. 2 and 6, and U.S. Pat. No. 3,701,039, Lang et al.) Since the currents originate from different sources and are passed through different switching circuits, it is difficult to satisfy conditions (1) and (2). A solid-state implementation necessitates that one source be implemented with NPN semiconductors and the other with PNP, exacerbating these difficulties. (It may be quite difficult to obtain a PNP transistor displaying characteristics exactly complementary to those of a given NPN transistor, or vice versa.) The problems are further compounded if it is attempted to implement the charge pump as an integrated circuit, which is desirable in view of the space and economic efficiencies and the higher reliability provided by integrated circuits--PNP transistors that are realizable in present-day integrated circuit technology are grossly inferior to the NPN transistors attainable. (See Gray at Section 2.4.2, pp 91 et seq.)